Senior Mixed Signal Design Engineer

United States·Santa Clarasenior

EngineeringDesign Engineer

2 views0 saves0 applied

Apply Now

Quick Summary

Key Responsibilities

Architect the Future: Take full ownership of high-speed Serdes architectures and transistor-level builds, pushing data rates to 80Gbps and higher.

Requirements Summary

MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience in the industry. Minimum 5 plus years of professional Analog Build experience,

Technical Tools

EngineeringDesign Engineer

Are you ready to take innovation further? At NVIDIA, we don’t just follow the industry; we define the next generation of connectivity. We seek a visionary Analog/Mixed-Signal Engineer to build and implement high-speed Serdes reaching 80Gbps and beyond. If you enjoy working with deep-submicron CMOS and excel in FinFET technology’s complexities and want to see your work evolve from a blank schematic to high-performance silicon, this is your opportunity. Join us and be part of a company transforming computer graphics, PC gaming, and accelerated computing!

Responsibilities

~1 min read

Architect the Future: Take full ownership of high-speed Serdes architectures and transistor-level builds, pushing data rates to 80Gbps and higher.

→
Silicon Ownership: Drive the entire lifecycle—from initial concept and schematic entry to layout, verification, and final silicon characterization.
→
Master the Physics: Optimize complex circuits for peak system performance, balancing noise, power, and loop stability in deep-submicron nodes.
→
Collaborative Precision: Partner closely with layout engineers to provide strategic floorplanning and high-speed routing mentorship that ensures design integrity.
→
Solve the Impossible: Lead post-silicon bring-up and debugging efforts, translating real-world data into build refinements.

Requirements

~2 min read

MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience in the industry.
Minimum 5 plus years of professional Analog Build experience, with a deep portfolio in FinFET and deep-submicron CMOS processes.
The Toolkit: Proficiency in the Cadence Virtuoso environment and a "black belt" in simulation tools (Spectre, HSpice, FineSim, or XA).
Analytical Rigor: Expertise in noise analysis, Monte Carlo simulations, and complex loop stability. Rich experience in high-speed data and/or clock path design.
Modeling Mastery: Proven ability in the modeling, timing, and functionality of both analog and digital circuits to streamline top-level verification.
The X-Factor: You go beyond working in a silo. You are a collaborative teammate who communicates clearly and solves problems with a "find a way" mentality.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until July 6, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.