Silicon Platform Engineer
Quick Summary
Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place! E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services.
We are seeking a skilled and driven Silicon Platform Engineer to join the System-on-Chip platform team that works on IP integration, chip-level verification, and firmware development. This is a System-on-Chip design, integration and verification role, working at the intersection of hardware and software. You will shape the platform from IP bring-up through full-chip validation: defining testbenches, authoring test firmware, and implementing critical chip features in silicon. This is a hands-on role with broad impact across the hardware development cycle.
- IP Integration: Evaluate, integrate, and verify IP blocks within the chip, ensuring correct connectivity, configuration, and interoperability across the platform.
- Feature and Module Firmware: Author targeted test firmware to bring up and verify individual IP blocks and hardware features at the module level.
- Subsystem Firmware: Develop subsystem-level test firmware to validate interactions between integrated components and confirm correct system behavior across hardware boundaries.
- Testbench Infrastructure: Define, implement, and maintain system-level testbenches covering subsystem and full-chip verification scenarios.
- Build Flow Management: Own and manage testbench build flows, ensuring reproducibility, scalability, and integration with the broader verification environment.
- Hardware Security: Implement chip-level security features, including secure boot, hardware root of trust, and cryptographic accelerator integration.
- Inter-Subsystem Communication: Define and implement communication fabrics and protocols between chip subsystems, including AMBA-based interconnects (AXI, AHB, APB).
- Power Management: Implement hardware power management features, including power domain control, clock gating, and low-power state transitions.
- Boot Flow and Configuration: Define and implement the chip boot architecture, including reset sequencing, configuration registers, and boot ROM integration.
- Experience with ARM Corstone reference designs and Cortex-M or Cortex-A processor integration.
- Familiarity with TrustedFirmware-M, MCUboot, or PSA-certified security architectures.
- Knowledge of embedded security concepts, including cryptographic algorithms and Post-Quantum Cryptography (PQC).
- Experience with formal verification or property checking tools.
- Familiarity with FPGA emulation platforms for pre-silicon validation.
- Knowledge of 3GPP network protocols as they relate to modem or connectivity subsystem integration.
- Experience with low-power chip design and power intent methodologies (UPF/CPF).
- Familiarity with Cortex-A and Cortex-M class processors, NPU processors, and DSP processors.
- Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
· Cross-Functional Partnership: Work closely with Silicon firmware engineers, RTL designers, and physical design teams to ensure cohesive hardware-software integration throughout the development cycle.
· Documentation: Produce and maintain clear technical documentation covering integration specifications, verification plans, test procedures, and feature implementation details.
Location & Eligibility
About this job
- Pay per year
- $150,000–$220,000 a year
- 9% above the $170,000 median for Devops Engineer jobs on Jobera (1,176 salaries).
- Who can apply
- United States
- Posted
- 192 days ago
Listing Details
- Posted
- May 1, 2026
- First seen
- May 2, 2026
- Last seen
- November 10, 2026
Posting Health
- Days active
- 192
- Repost count
- 0
- Trust Level
- 42%
- Scored at
- November 10, 2026
Signal breakdown
Browse Similar Jobs
Stay ahead of the market
Get the latest job openings, salary trends, and hiring insights delivered to your inbox every week.
No spam. Unsubscribe at any time.