Principal Digital Design Engineer

• Lead digital architecture, design, verification, and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications.

• Drive product execution from concept through RTL development, integration, silicon validation, qualification, and production release.

• Collaborate across analog, verification, validation, subsystem, SoC, applications, systems, product definition, and customer-facing teams to deliver high-quality mixed-signal solutions.

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  Review product requirements, IP architecture specifications, programming models, microarchitecture, interfaces, and implementation plans for automotive and industrial PMIC applications.

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  Define and implement digital architectures for mixed-signal PMICs, ensuring alignment with system, performance, quality, reliability, safety, power, and area requirements.

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  Lead digital design activities from architecture definition through RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up, and production release.

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  Design and develop digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing, and fault management functions for PMIC and power conversion products.

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  Develop and review RTL, microarchitecture, and design specifications using Verilog/SystemVerilog and industry-standard design and quality checking tools.

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  Drive verification strategy and execution, including test planning, simulation, formal verification, coverage analysis, regression management, and achievement of NXP quality and maturity standards.

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  Deliver complete IP solutions, including RTL, verification collateral, supporting documentation, and requirements traceability from specification through implementation.

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  Track development metrics including milestones, code and functional coverage, defect resolution, and compliance with design requirements.

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  Support silicon debug, characterization, qualification, reliability validation, and production ramp activities.

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  Mentor junior engineers and drive continuous improvement in design methodologies, automation flows, and engineering best practices.

• M.S. in Electrical Engineering, Computer Engineering, or a related field required.

• Minimum 12 years of experience in digital IC design and development, including technical leadership and architecture responsibilities.

• Strong understanding of digital design fundamentals, finite state machines, clock-domain crossing, reset architecture, and low-power design techniques.

• Expertise in RTL design using Verilog/SystemVerilog for complex digital and mixed-signal ICs.

• Experience with synthesis, static timing analysis, equivalence checking, DFT, and physical implementation flows.

• Strong knowledge of modern verification methodologies, including UVM, assertions, formal verification, and coverage-driven verification.

• Experience developing digital controllers for PMICs, power management systems, automotive electronics, or industrial applications is highly desirable.

• Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA.

• Strong analytical and problem-solving skills with the ability to develop innovative solutions for complex technical challenges.

• Excellent written and verbal communication skills with proven ability to lead cross-functional teams in a fast-paced product development environment.

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.