Lead Principal Test Engineering (f/m/div)
lead
EngineeringQa Engineer
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Quick Summary
Key Responsibilities
Test and DfT concept for analog/mixed‑signal ICs bring‑up characterization correlation/limit setting
Requirements Summary
model test cost define test coverage and select equipment (testers/handlers/probers) and align with site strategies and long‑term road
Technical Tools
EngineeringQa Engineer
#WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problemsolvers behind tomorrow’s technology. As a Lead Principal Test Engineering on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in? Your role Key responsibilities in your new role Serve as technical authority and technical lead for a senior Test Development team; coach influence and set technical direction across programs Own test strategy end‑to‑end : Test and DfT concept for analog/mixed‑signal ICs bring‑up characterization correlation/limit setting qualification production release and ramp Lead high‑voltage and power testing in NPI (ACDC isolated gate drivers HV protection ICs) ensuring safe repeatable methods and strategies Drive development on key ATE platforms (Advantest V93k Teradyne ETS‑88 and others) spanning test programs and test hardware (load boards/probe cards) Optimize test cost and throughput : model test cost define test coverage and select equipment (testers/handlers/probers) and align with site strategies and long‑term roadmaps and ensure rigorous delivery: plan resources and budgets supervise project execution manage risks and gates Act as the technical problem‑solving authority : take ownership of critical issues in your scope and across interfaces (peers process gaps vendors/OSATs) and drive them to closure. Apply analytical structured methods and coach others to diagnose root causes learn and implement permanent fixes Initiate and steer cross‑site Test Engineering programs and R&D initiatives to improve methodology development flow quality and reliability and promote practical analytics and AI (including AI‑assisted coding and agentic workflows) to streamline engineering and accelerate development cycles Your profile Qualifications and skills to help you succeed Master’s degree in Electrical/Electronic Engineering (or equivalent) At least 10 years of semiconductor test development experience with a track record at Principal/Lead Principal level; proven ability to lead senior engineers informally Strong expertise in DfT for analog/mixed‑signal and solid analog/measurement fundamentals Proficient high‑voltage/power testing background from lab to ATE solid knowledge of discrete power and HV switches Hands‑on ATE expertise : Advantest V93k (ideally SMT8) Teradyne Eagle ETS‑88 and/or MicroFlex; experience in both test programs and test hardware Skilled in correlation Gr&R/MSA guardbanding DoE SPC ; proven NPI‑to‑HVM ramps improving yield quality and test time/cost Excellent stakeholder and expectation management, fluent English and German is a plus #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon. Bruna Fernandes
Location & Eligibility
Where is the job
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About this job
- Posted
- Today
Listing Details
- Posted
- October 20, 2026
- First seen
- October 20, 2026
- Last seen
- October 20, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 56%
- Scored at
- October 20, 2026
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