Staff FPGA Digital Design Engineer Level 5 (AHT)

In this capacity, you will utilize your working knowledge of digital signal processing and digital interfaces to work on FPGA and ASIC Design across the full product life cycle process. Through the use of Model-based Engineering, DevSecOps and Agile practices we continue to evolve how we deliver critical national defense products and capabilities for the warfighter. Our success is grounded in our ability to embrace change, move quickly and continuously drive innovation.

• →Design, develop, modify and evaluate digital electronic parts, components or integrated circuitry for digital electronic equipment and other hardware systems.
• →Determine design approaches and parameters.
• →Analyze equipment to establish operating data, conduct experimental tests, and evaluate results.
• →Select components and equipment based on analysis of specifications and reliability.
• →Review vendor capability to support product development.
• →Responsible for research, design, and development for complex high speed digital designs
• →Support the implementation of digital FPGA hardware architecture and algorithms
• →Collaborate with Systems Engineering to ensure firmware design meets system level requirements
• →Review designs and analysis

• Bachelor’s degree in electrical engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline with 12 years of digital design & verification engineering experience using industry standard simulation tools; or 10 years with an MS degree
• Must have hands on FPGA design experience with VHDL and/or Verilog within the past 6 years.
• Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs.
  Experience with Electronic Design Automation (EDA) Tools: Vivado, Quartus, and QuestaSim.
• Must be able to obtain an Active US Government Secret security clearance

• Proficient in DSP algorithms and its implementation onto the FPGA using MATLAB and SimuLink.
• Strong design skills in VHDL & Verilog.
• Experience in FPGA physical constraints and achieving timing closure.
• Experience in developing low-level FPGA requirements and developing verification procedures.
• Background in RF design is a plus.
• Experience with board or system level debug using test equipment such as oscilloscopes, logic and spectrum analyzers, RF signal generator, etc.
• Generation of complex test benches in Modelsim or Questasim to support formal Verification.
• Familiarity with the VxWorks RTOS, its architecture and development tools is a plus.
• Expertise in high-speed FPGA implementation such as AXI, DMA, PCIe, HSSI, DDR3, Ethernet, etc.