CVD Process Engineer - Days
Quick Summary
A CVD process engineer is responsible for process qualification, performance, and abnormal product disposition.
You’ll be focused on developing process rework procedures, implementing defense lines to prevent excursions, and continuously improving process recipes to meet defectivity and productivity targets.
Also, you’ll work directly with senior process engineers, device physicists, and fab operations leaders to design, qualify, and scale thin film processes (ALD, PECVD, etc.).
Role and Responsibilities
Here's what you'll be responsible for:
A CVD process engineer is responsible for process qualification, performance, and abnormal product disposition.
Process Transfer
- Process recipe transfer and qualification from parent line
- Gather metrology data during tool qualification phase and ensure film properties meet specs.
- Ensure process matching across fabs and between tools using statistical tools.
- Set up defense lines to catch and prevent abnormal processing conditions.
Sustaining
- Understand fundamentals of wafer recovery from tools, manual processing, tool UI navigation, recipe structure + editable parameters, and process tuning.
- Monitor SPC charts to maintain process performance within optimal range.
- Understand process chemistries and their immediate downstream impacts to subsequent processes.
- Respond to process abnormalities, create troubleshooting plans, and apply corrective action plans.
- Provide clear updates and instructions to technicians regarding ongoing issues and resolutions.
Continuous Improvement
- Work with senior engineers to develop and design experiments to carry out improvements in yield, reliability, cost, and throughput.
- Develop abnormal product rework and disposition plans.
- Maintain and continuously update a process reference book on a weekly basis.
Skills and Qualifications
Here's what you'll need:
- Minimum educational requirement: Bachelor’s degree in an engineering discipline (Chemical, Electrical) or related degree (Materials Eng, Physics, Chemistry, etc.)
- Cumulative GPA Minimum: 3.0.
- Fundamentals of statistical process control (SPC).
- Fundamentals of CVD chemistries and logic circuits.
- Basic project management skills.
- Be proficient with Microsoft Windows based applications.
Requirements
~2 min readTotal Rewards
At Samsung Austin Semiconductor, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.
We offer a comprehensive benefits package, including:
- Medical, dental, and vision insurance
- Life insurance and 401(k) matching with immediate vesting
- Onsite café(s) and workout facilities
- Paid maternity and paternity leave
- Paid time off (PTO) + 2 personal holidays and 10 regular holidays
- Wellness incentives and MORE
Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.
All positions at Samsung Austin Semiconductor are full-time on-site.
Trade Secrets
By submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.
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* Samsung Electronics America, Inc. and its subsidiaries are committed to Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
Location & Eligibility
About this job
- Pay per year
- $76,000–$120,000 a year
- 14% below the $114,375 median for Process Engineer jobs on Jobera (210 salaries).
- Who can apply
- United States
- Posted
- 9 days ago
Listing Details
- Posted
- October 15, 2026
- First seen
- October 24, 2026
- Last seen
- October 24, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 40%
- Scored at
- October 24, 2026
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