Quick Summary
• Review and Analyze defect images captured by diverse metrology tools. • Accurately classify defects based on documented defect specification.
Minimum qualifications are required to be initially considered for this position. • Diploma in Engineering (Manufacturing, Mechatronics, Semiconductor Technology, Electronics,
Be a part of Intel's Advanced Packaging Command Center (APCC), the global command center for Advanced Packaging that provides remote capabilities, follow-on engineering, and operational support across Wafer Packaging Manufacturing (WPM). Through APCC, engineering expertise is focused to improve coordination across regions, drive standardization, and improve responsiveness, while strengthening end-to-end operational execution across regions and delivering consistent, high-quality execution at scale.
As the defect review technician, you will be instrumental in supporting global defect review activities, including defect classification, validation, and hold lot disposition. You will help maintain quality excellence while contributing to APCC's mission of delivering standardized, high-quality execution at scale. Your primary focus will be the accurate classification of defects captured by multiple inspection systems. Through precise defect classification, you will play a vital role in minimizing defect noise, driving systematic defect reduction initiatives, and maintaining the optimal balance between quality control and manufacturing efficiency.
Responsibilities will include but are not limited to
Defect Classification and Analysis:
• Review and Analyze defect images captured by diverse metrology tools.
• Accurately classify defects based on documented defect specification.
• Distinguish between true defects requiring disposition action and false positives or nuisance defects.
• Maintain proficiency across multiple inspection platforms and adapt classification criteria to different tool capabilities and imaging conditions
Defect Validation:
• Verify defect classifications against established criteria and specifications
• Partner with Layer Owner to ensure consistent defect categorization approaches
• Prevent over-rejection scenarios by accurately identifying non-critical defects and cosmetic variations that do not impact product performance.
• Avoid under-rejection situations by ensuring killed defects are properly identified and flagged for disposition.
Hold Lot Disposition:
• Ensure strict compliance in review and disposition of hold lots based on documented Out-of-Control Action Plans (OCAP)
• Ensure proper documentation and traceability of all disposition decisions.
• Collaborate with Layer Owner to update and refine OCAP procedures based on emerging defect patterns
• First Level Defect Analysis
• Perform comprehensive first level defect analysis as the initial point of technical review for all flagged defects.
• Document initial findings and recommendations to support Layer Owner analysis and decision-making processes.
Requirements
~1 min read*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Location & Eligibility
About this job
- Who can apply
- Malaysia
- Posted
- Today
Listing Details
- Posted
- October 27, 2026
- First seen
- October 27, 2026
- Last seen
- October 27, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 56%
- Scored at
- October 27, 2026
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