Memory Design Engineer

The Advanced Design (AD) team is part of Intel’s larger Design Technology Platform (DTP) Organization and is focused on pathfinding and development of advanced memory technology.  These circuits enable best-in-class memory collateral, IP and innovative product design across all generations of Intel process technology.  At Intel, DTP is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable Intel’s internal and external customers to get to the market faster with products that include high-performance, high-density, low-power memory at the leading edge of the technology curve and implemented in Intel’s advanced CMOS process technologies.  

In this position your responsibilities will include, but may not be limited to:

• Define, develop, and optimize advanced memory bitcells, array architectures, and peripheral circuits.
• Lead memory pathfinding and optimize power, performance, and area (PPA) through design-technology co-optimization (DTCO) and product design enablement.
• Develop and validate memory libraries for PDK enablement across Intel's advanced process technologies.
• Design memory arrays and IP, develop innovative memory circuits, and execute and validate test chips.

Your contributions will directly enable leading-edge products with high-performance, high-density, low-power memory implemented on Intel's advanced CMOS process technologies.

• BA degree with 3 years of experience or Master's degree in Electrical Engineering, Computer Engineering, or a related STEM field with 2+ years of experience OR a PhD with no experience.
• Experience in customer circuit design, simulation, layout design and verification.
• Hands-on experience with relevant industry EDA tools and flows for digital and/or analog design and verification, such as Cadence Virtuoso, Synopsys StarRC, and Synopsys HSPICE.

• Experience in memory bitcell and circuit design.
• Experience with advanced CMOS process technologies and device physics.
• Experience evaluating and balancing power, performance, and area trade-offs.
• Experience designing, characterizing, and verifying custom memory circuits, such as SRAM, register files, and ROM.
• Experience optimizing the physical design of custom circuits.

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