3h ago
New

SoC Logic Design Engineer

Costa RicaCosta Rica·San Josémid
EngineeringDesign Engineer
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Quick Summary

Key Responsibilities

Develop RTL designs for SoC, integrating IP blocks and subsystems into full chip designs. Participate in defining architecture and microarchitecture features for design blocks.

Technical Tools
EngineeringDesign Engineer

The Role and Impact

As a SoC Logic Design Engineer, you will be responsible for creating and optimizing the Register Transfer Level (RTL) design for System-on-Chip (SoC) projects. You will integrate logic of IP blocks and subsystems into complete SoC designs, ensuring power, performance, and timing requirements are met. Your work will play a critical role in delivering high-quality designs that enable Intel products to excel in cutting-edge technologies.

 

Business Group

Intel Corporation is a global leader in semiconductor innovation, enabling advancements in computing and connectivity. This role is within our System-on-Chip (SoC) design engineering team, which focuses on developing high-performance, reliable, and secure solutions. Join a group that drives technology leadership and supports Intel's mission to power a world enriched by data.

 

Responsibilities

~1 min read

 

  • →Develop RTL designs for SoC, integrating IP blocks and subsystems into full chip designs.
  • →Participate in defining architecture and microarchitecture features for design blocks.
  • →Perform quality checks on logic design aspects, ensuring convergence in timing, power, and functionality.
  • →Apply strategies and tools to optimize logic for power, performance, area, and timing goals.
  • →Review verification plans to validate design features and resolve issues in RTL tests.
  • →Follow secure development practices to address security requirements within designs.
  • →Work with IP providers to integrate and validate IPs at the SoC level.
  • →Drive quality assurance compliance for smooth IP-to-SoC handoff.

Requirements

~1 min read

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

 

  • Knowledge in SystemVerilog, OVM/UVM, and object-oriented programming.
  • Experience in SOC-level design, integration, and/or validation.
  • Familiarity with RTL quality checks and simulation-based debugging tools like VCS, Verdi, and DVE.
  • Understanding of computer (CPU) or system (platform) architecture.
  • Exposure to front-end design tools, flows, and methodologies.

 

Your expertise will contribute to creating innovative solutions that shape the future of technology. Explore new opportunities and advance your career with Intel.

          

College Grad

Shift 1 (Costa Rica)

Costa Rica, San Jose

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Location & Eligibility

Where is the job
San José, Costa Rica
On-site at the office
Who can apply
CR

About this job

Who can apply
Costa Rica
Posted
Today
Employer
has 1,024 open jobs on Jobera in 14 countries.

Listing Details

Posted
October 17, 2026
First seen
October 17, 2026
Last seen
October 17, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
56%
Scored at
October 17, 2026

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SoC Logic Design Engineer