14d ago
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Senior Lead Design Engineer

IndiaIndia·Bangaloresenior
EngineeringDesign Engineer
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Quick Summary

Overview

NXP's MCU/MPU Engineering (MME) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXP's Automotive, Edge,

Technical Tools
EngineeringDesign Engineer

NXP's MCU/MPU Engineering (MME) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXP's Automotive, Edge, Radar Processing and Advanced Analog business lines.

MME's SoC Front End team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards.

Responsibilities

~1 min read
  • →Leading SOC debug , micro-architecture, and integration of the System on Chip (SOC) from initial specification till tape out and beyond
  • →Drive and implement best SoC design methodology/practices and scale it across different business lines.
  • →Signing off RTL, timing constraints, CDC, RDC and work with different functions like verification, DFT, synthesis, etc. to get to a production quality Silicon.
  • →Documenting the SOC design and micro-architecture for usage by other SOC functions
  • →Provide debug design support for any silicon related debugs of chips in post-silicon phase.

  • ASIC designers with experiences in all aspects of RTL design flow from Specification/Micro-architecture definition to design.
  • Experience with Arm Cortex-M/A/R processor-based SoC debug infrastructure handling
  • ARM CoreSight, ETM, STM, DAP, CTI, JTAG, SWD, Trace32, ARM Debug, ARM Trace integration exposure
  • Experience: 5-10 Years in IP/SOC design with successful delivery of production quality chips
  • Good knowledge of Digital Design and hands-on experience with Verilog RTL coding/integration of debug logic
  • Should have a firm understanding and hands-on experience on Chip Assembly, IP Integration, RTL signoff tools and CDC/RDC/Lint/Synthesis.
  • Familiarity with Computer architecture: knowledge of microprocessors (ARM, RISC-V), bus protocols preferred (AXI/ACE/APB/ATB). Knowledge on CPU architecture, Core-sight and peripherals like PCIe, USB, DDRs is highly desirable.
  • Strong domain knowledge of Clocking, Reset, System modes, debug, interconnect, safety, security and other architectures Know-how of Serial Interfaces, Multimedia, External Bus Interfaces
  • Self-motivated to drive issues to closure. Should be a team player and willing to work with cross functional teams on issues resolution.
  • Excellent written and verbal communication skill.
  • Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.


More information about NXP in India...

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Location & Eligibility

Where is the job
Bangalore, India
On-site at the office
Who can apply
IN

About this job

Who can apply
India
Posted
14 days ago
Employer
has 847 open jobs on Jobera in 21 countries.

Listing Details

Posted
October 8, 2026
First seen
October 18, 2026
Last seen
October 22, 2026

Posting Health

Days active
3
Repost count
0
Trust Level
19%
Scored at
October 22, 2026

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Senior Lead Design Engineer